CAGE 5MSR9 - PACIFIC MICROCHIP CORP.
USA

PACIFIC MICROCHIP CORP.

DBA PACIFIC MICROCHIP

CAGE Code: 5MSR9
DUNS: 831566877
3916 SEPULVEDA BLVD STE 108
CULVER CITY CA 90230-0000
UNITED STATES

Telephone: 3106832628
Fax: 3105647793


PACIFIC MICROCHIP CORP., DBA PACIFIC MICROCHIP is an Active Commercial Supplier with the Cage Code 5MSR9 and is tracked by Dun & Bradstreet under DUNS Number 831566877.

Additional Data For CAGE 5MSR9

SIC Code 1:8711
Status:A
Type:F
Size:N
Primary Business:N
Type of Business:N
Woman Owned:N
CAO:S0512A
ADP CNT CT:HQ0339

USA Government Contracting Activity for 5MSR9

Friday, December 1, 2017
$0.00
9700: Department of Defense
140D04: IBC ACQ SVCS DIRECTORATE (00004)

D: DEFINITIVE CONTRACT
HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ12: R&D- OTHER RESEARCH AND DEVELOPMENT (APPLIED RESEARCH/EXPLORATORY DEVELOPMENT)

  IND17PC00116     SBIR 15.3  
Monday, October 23, 2017
$150,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS GEOSTAR SPECTRAL RADIOMETER PROCESSING DATA FROM ANTENNA CONSISTING OF THREE ARMS, EACH HOLDING 128 MICROWAVE RECEIVERS. EACH OF THE 384 RECEIVERS AMPLIFIES RF SIGNALS, AND DOWN-CONVERTS THEM TO AN INTERMEDIATE FREQUENCY (IF). AS A RESULT, 768 IN-PHASE (I) AND QUADRATURE (Q) SIGNALS ARE PRODUCED WITH A FREQUENCY OF 10 TO 500MHZ. THE IF SIGNALS HAVE TO BE NORMALIZED AND DIGITIZED WITH 1GS/S SAMPLING RATE FOR FURTHER CROSS-CORRELATION. EACH SIGNAL FROM ONE ARM OF THE RECEIVER MUST BE CROSS-CORRELATED WITH ALL SIGNALS FROM THE OTHER TWO ARMS, THEREFORE A SYSTEM CONTAINING 196,000 PARALLEL CROSS-CORRELATION BLOCKS IS NEEDED. SINCE THE GEOSTAR IS A SPACE BORN INSTRUMENT, LOW POWER DISSIPATION AND ENSURING SYSTEM RELIABILITY, THROUGH PROCESSING REDUNDANCY, ARE ONE OF THE MOST IMPORTANT REQUIREMENTS. A SYSTEM ASSEMBLED BY USING OFF-THE-SHELF COMPONENTS WOULD BE EXTREMELY POWER INEFFICIENT, BULKY, AND UNRELIABLE. THEREFORE, A SYSTEM THAT IS BASED ON APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS) IS REQUIRED. WHILE WORKING ON THE NASA'S SBIR PHASE II PROJECT "LOW POWER CROSS-CORRELATOR ASIC" (NNX13CP01C), PACIFIC MICROCHIP CORP. HAS DEVELOPED AND FABRICATED AN ASIC THAT INCLUDES 128-ELEMENT ARRAY OF 2-BIT 1GS/S ADCS, AND 4096 PARALLEL CROSS-CORRELATION CELLS. THE ASIC WAS DESIGNED BASED ON THE GEOSTAR RADIOMETER REQUIREMENTS, THEREFORE IT IS INTENDED TO BE THE KEY COMPONENT IN THE CROSS-CORRELATOR SYSTEM WHICH IS BEING DEVELOPED. THE SYSTEM WILL CONTAIN MEANS CORRELATION RESULTS FURTHER POST-PROCESSING AND CONTROL OF ASICS.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CP17C     NNX15SBIRII  
Wednesday, October 4, 2017
$0.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ12: R&D- OTHER RESEARCH AND DEVELOPMENT (APPLIED RESEARCH/EXPLORATORY DEVELOPMENT)

  IND17PC00116     SBIR 15.3  
Saturday, September 30, 2017
$0.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS GEOSTAR SPECTRAL RADIOMETER PROCESSING DATA FROM ANTENNA CONSISTING OF THREE ARMS, EACH HOLDING 128 MICROWAVE RECEIVERS. EACH OF THE 384 RECEIVERS AMPLIFIES RF SIGNALS, AND DOWN-CONVERTS THEM TO AN INTERMEDIATE FREQUENCY (IF). AS A RESULT, 768 IN-PHASE (I) AND QUADRATURE (Q) SIGNALS ARE PRODUCED WITH A FREQUENCY OF 10 TO 500MHZ. THE IF SIGNALS HAVE TO BE NORMALIZED AND DIGITIZED WITH 1GS/S SAMPLING RATE FOR FURTHER CROSS-CORRELATION. EACH SIGNAL FROM ONE ARM OF THE RECEIVER MUST BE CROSS-CORRELATED WITH ALL SIGNALS FROM THE OTHER TWO ARMS, THEREFORE A SYSTEM CONTAINING 196,000 PARALLEL CROSS-CORRELATION BLOCKS IS NEEDED. SINCE THE GEOSTAR IS A SPACE BORN INSTRUMENT, LOW POWER DISSIPATION AND ENSURING SYSTEM RELIABILITY, THROUGH PROCESSING REDUNDANCY, ARE ONE OF THE MOST IMPORTANT REQUIREMENTS. A SYSTEM ASSEMBLED BY USING OFF-THE-SHELF COMPONENTS WOULD BE EXTREMELY POWER INEFFICIENT, BULKY, AND UNRELIABLE. THEREFORE, A SYSTEM THAT IS BASED ON APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS) IS REQUIRED. WHILE WORKING ON THE NASA'S SBIR PHASE II PROJECT "LOW POWER CROSS-CORRELATOR ASIC" (NNX13CP01C), PACIFIC MICROCHIP CORP. HAS DEVELOPED AND FABRICATED AN ASIC THAT INCLUDES 128-ELEMENT ARRAY OF 2-BIT 1GS/S ADCS, AND 4096 PARALLEL CROSS-CORRELATION CELLS. THE ASIC WAS DESIGNED BASED ON THE GEOSTAR RADIOMETER REQUIREMENTS, THEREFORE IT IS INTENDED TO BE THE KEY COMPONENT IN THE CROSS-CORRELATOR SYSTEM WHICH IS BEING DEVELOPED. THE SYSTEM WILL CONTAIN MEANS CORRELATION RESULTS FURTHER POST-PROCESSING AND CONTROL OF ASICS.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CP17C     NNX15SBIRII  
Monday, September 18, 2017
$0.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS GEOSTAR SPECTRAL RADIOMETER PROCESSING DATA FROM ANTENNA CONSISTING OF THREE ARMS, EACH HOLDING 128 MICROWAVE RECEIVERS. EACH OF THE 384 RECEIVERS AMPLIFIES RF SIGNALS, AND DOWN-CONVERTS THEM TO AN INTERMEDIATE FREQUENCY (IF). AS A RESULT, 768 IN-PHASE (I) AND QUADRATURE (Q) SIGNALS ARE PRODUCED WITH A FREQUENCY OF 10 TO 500MHZ. THE IF SIGNALS HAVE TO BE NORMALIZED AND DIGITIZED WITH 1GS/S SAMPLING RATE FOR FURTHER CROSS-CORRELATION. EACH SIGNAL FROM ONE ARM OF THE RECEIVER MUST BE CROSS-CORRELATED WITH ALL SIGNALS FROM THE OTHER TWO ARMS, THEREFORE A SYSTEM CONTAINING 196,000 PARALLEL CROSS-CORRELATION BLOCKS IS NEEDED. SINCE THE GEOSTAR IS A SPACE BORN INSTRUMENT, LOW POWER DISSIPATION AND ENSURING SYSTEM RELIABILITY, THROUGH PROCESSING REDUNDANCY, ARE ONE OF THE MOST IMPORTANT REQUIREMENTS. A SYSTEM ASSEMBLED BY USING OFF-THE-SHELF COMPONENTS WOULD BE EXTREMELY POWER INEFFICIENT, BULKY, AND UNRELIABLE. THEREFORE, A SYSTEM THAT IS BASED ON APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS) IS REQUIRED. WHILE WORKING ON THE NASA'S SBIR PHASE II PROJECT "LOW POWER CROSS-CORRELATOR ASIC" (NNX13CP01C), PACIFIC MICROCHIP CORP. HAS DEVELOPED AND FABRICATED AN ASIC THAT INCLUDES 128-ELEMENT ARRAY OF 2-BIT 1GS/S ADCS, AND 4096 PARALLEL CROSS-CORRELATION CELLS. THE ASIC WAS DESIGNED BASED ON THE GEOSTAR RADIOMETER REQUIREMENTS, THEREFORE IT IS INTENDED TO BE THE KEY COMPONENT IN THE CROSS-CORRELATOR SYSTEM WHICH IS BEING DEVELOPED. THE SYSTEM WILL CONTAIN MEANS CORRELATION RESULTS FURTHER POST-PROCESSING AND CONTROL OF ASICS.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CP17C     NNX15SBIRII  
Thursday, August 31, 2017
$150,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE MEASUREMENT OF THE MAGNETIC FIELD VECTOR IS OF FUNDAMENTAL IMPORTANCE TO SPACE PHYSICS MISSIONS. THE FLUXGATE MAGNETOMETER IS A DEVICE DEVELOPED FOR PRECISE VECTOR MEASUREMENT OF STATIC MAGNETIC FIELDS. THE HIGH PERFORMANCE MAGNETOMETERS ARE REQUIRED IN SUCH NASA MISSIONS AS ICON, GOLD, SOLAR ORBITER, SOLAR PROBE PLUS, ONEP, SEPAT, INCA, CISR, DGC, HMAG AND OTHER PLANETARY EXPLORATIONS. THE ANALOG-TO-DIGITAL CONVERTER (ADC) IS ONE OF THE CRITICAL COMPONENTS OF THE MAGNETOMETER. THE ERFORMANCE OF THE MAGNETOMETER DIRECTLY DEPENDS ON THE ADC'S CHARACTERISTICS SUCH AS THE RESOLUTION, ACCURACY, AND CONVERSION SPEED. THE GENERAL REQUIREMENTS FOR ALL ADCS USED IN SPACE MISSIONS ARE LOW POWER CONSUMPTION, LOW AREA, AND HIGH RADIATION TOLERANCE. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A RAD-HARD ADC SPECIFICALLY TARGETED FOR APPLICATION IN FLUXGATE MAGNETOMETERS. PHASE I WORK PROVIDED A PROOF OF FEASIBILITY, COMPLETE DEFINITION AND VALIDATION BASED ON EXTENSIVE SIMULATION AND ANALYSIS OF THE PROPOSED ADC. DURING PHASE II THE ADC DESIGN WILL BE FINISHED, THE ADC WILL BE FABRICATED, PACKAGED AND TESTED (INCLUDING RADIATION HARDINESS). AT THE END OF PHASE II A FIELDABLE PRODUCT WILL BE PRODUCED. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, THE PRODUCT WILL BE FABRICATED USING A COMMERCIAL 180NM CMOS TECHNOLOGY.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CG05C     NNX15SBIRII  
Monday, August 28, 2017
$255,000.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ12: R&D- OTHER RESEARCH AND DEVELOPMENT (APPLIED RESEARCH/EXPLORATORY DEVELOPMENT)

  IND17PC00116     SBIR 15.3  
Wednesday, August 16, 2017
$0.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ12: R&D- OTHER RESEARCH AND DEVELOPMENT (APPLIED RESEARCH/EXPLORATORY DEVELOPMENT)

  IND17PC00116     SBIR 15.3  
Tuesday, August 15, 2017
$0.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE MEASUREMENT OF THE MAGNETIC FIELD VECTOR IS OF FUNDAMENTAL IMPORTANCE TO SPACE PHYSICS MISSIONS. THE FLUXGATE MAGNETOMETER IS A DEVICE DEVELOPED FOR PRECISE VECTOR MEASUREMENT OF STATIC MAGNETIC FIELDS. THE HIGH PERFORMANCE MAGNETOMETERS ARE REQUIRED IN SUCH NASA MISSIONS AS ICON, GOLD, SOLAR ORBITER, SOLAR PROBE PLUS, ONEP, SEPAT, INCA, CISR, DGC, HMAG AND OTHER PLANETARY EXPLORATIONS. THE ANALOG-TO-DIGITAL CONVERTER (ADC) IS ONE OF THE CRITICAL COMPONENTS OF THE MAGNETOMETER. THE ERFORMANCE OF THE MAGNETOMETER DIRECTLY DEPENDS ON THE ADC'S CHARACTERISTICS SUCH AS THE RESOLUTION, ACCURACY, AND CONVERSION SPEED. THE GENERAL REQUIREMENTS FOR ALL ADCS USED IN SPACE MISSIONS ARE LOW POWER CONSUMPTION, LOW AREA, AND HIGH RADIATION TOLERANCE. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A RAD-HARD ADC SPECIFICALLY TARGETED FOR APPLICATION IN FLUXGATE MAGNETOMETERS. PHASE I WORK PROVIDED A PROOF OF FEASIBILITY, COMPLETE DEFINITION AND VALIDATION BASED ON EXTENSIVE SIMULATION AND ANALYSIS OF THE PROPOSED ADC. DURING PHASE II THE ADC DESIGN WILL BE FINISHED, THE ADC WILL BE FABRICATED, PACKAGED AND TESTED (INCLUDING RADIATION HARDINESS). AT THE END OF PHASE II A FIELDABLE PRODUCT WILL BE PRODUCED. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, THE PRODUCT WILL BE FABRICATED USING A COMMERCIAL 180NM CMOS TECHNOLOGY.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CG05C     NNX15SBIRII  
Wednesday, June 7, 2017
$755,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE PROPOSED PROJECT AIMS TO DEVELOP A 20GSPS 6-BIT ADC REQUIRED FOR MICROWAVE RADIOMETERS BEING DEVELOPED FOR SPACE AND AIRBORNE EARTH SENSING APPLICATIONS AND RADIO TELESCOPES. AIMING TO IMPROVE PERFORMANCE AND TO REDUCE THE SIZE OF THE ELECTRONICS, HIGH RESOLUTION, HIGH-SAMPLING RATE, POWER EFFICIENCY AND LOW SPUR ENERGY ARE REQUIRED FOR ADCS EMPLOYED FOR DIRECT DIGITIZATION. THE PROPOSED 20GS/S 6-BIT TIME-INTERLEAVED SUCCESSIVE APPROXIMATION (SAR) ADC IS INTENDED TO ACHIEVE>5 ENOB AND 20GHZ INPUT BANDWIDTH. A NUMBER OF INNOVATIONS WILL BE INTRODUCED TO THE ADC IN ORDER TO COMBINE LOW POWER CONSUMPTION WITH HIGH SIGNAL TO NOISE AND DISTORTION (SINAD), AND SPURIOUS FREE DYNAMIC RANGE (SFDR). THE PROPOSED ADC WILL EMPLOY A NOVEL TIMING CALIBRATION AND INTERLEAVE RANDOMIZING TECHNIQUES WHICH PERMIT MINIMIZING THE PEAK ENERGY OF THE SPURS AND INCREASING LINEARITY. THE PROPOSED ADC CHIP WILL INCLUDE A FREQUENCY SYNTHESIZER AND A STANDARD COMPLIANT CONFIGURABLE JESD204B INTERFACE FOR DATA EXCHANGE WITH AN FPGA. THE ADC WILL BE IMPLEMENTED USING A DEEP SUBMICRON CMOS TECHNOLOGY. THE PROJECT'S PHASE I CONFIRMED THE FEASIBILITY OF IMPLEMENTING THE PROPOSED ADC. PHASE II WILL INCLUDE FINISHING DESIGN, FABRICATION, TESTING AND DELIVERING THE ADC PROTOTYPES WHICH WILL BE READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX17CP12C  
Monday, June 5, 2017
$125,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF THE PROPOSAL AIMS TO DEVELOP A RADIATION HARDENED ANALOG-TO-DIGITAL CONVERTER (ADC) REQUIRED FOR THE KINETIC INDUCTANCE DETECTOR (KID) READOUT ELECTRONICS. KIDS ARE DEVELOPED FOR PHOTOMETERS AND SPECTROMETERS FOR ASTROPHYSICS FOCAL PLANES, AND EARTH OR PLANETARY REMOTE SENSING INSTRUMENTS. ADCS EMPLOYED IN SPACE BASED KIDS ARE REQUIRED TO COMBINE SEVERAL FEATURES: RADIATION HARDNESS, LOW POWER CONSUMPTION, HIGH RESOLUTION AND HIGH-SAMPLING RATE TO FACILITATE INCREASE IN THE NUMBER OF THE READOUT TONES AND TO REDUCE THE SIZE OF THE ELECTRONICS. THE PROPOSED SAR ADC AIMS TO ACHIEVE A 12-BIT RESOLUTION AND THE LOWEST TO DATE REPORTED FIGURE OF MERIT (FOM) AT THE 1GSPS RATE. A NUMBER OF INNOVATIONS WILL BE INTRODUCED TO THE ADC IN ORDER TO COMBINE LOW POWER CONSUMPTION (BELOW 100MW) WITH THE SIGNAL TO NOISE AND DISTORTION RATIO (SINAD) OF AT LEAST 65DB. TOLERANCE TO AT LEAST 4MRADS OF TOTAL IONIZING DOSE (TID) RADIATION AND IMMUNITY TO THE SINGLE EVENT EFFECTS (SEES) WILL BE ACHIEVED BY EMPLOYING RADIATION HARDENING TECHNIQUES SUCH AS RHBD, RHBL AND RHBS. A NOVEL CALIBRATION TECHNIQUE FOR THE CAPACITOR MISMATCH WILL BE INTRODUCED TO IMPROVE LINEARITY AND INCREASE THE SAMPLING RATE. THE PROPOSED CALIBRATION TECHNIQUE INTRODUCED TO THE SUB-RANGING ARCHITECTURE WITH APPLICATION OF THE ASYNCHRONOUS SAR LOGIC WILL FACILITATE REDUCTION OF SWITCHING POWER. PHASE I WORK WILL PROVIDE THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED ADC. PHASE II WILL RESULT IN THE SILICON PROVEN ADC PROTOTYPES BEING READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX17CP61P  
Monday, June 5, 2017
$125,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF THE PROPOSED PROJECT AIMS TO DEVELOP AN APPLICATION SPECIFIC INTEGRATED CIRCUIT (ASIC) FOR THE NASA'S MICROWAVE CORRELATION RADIOMETERS REQUIRED FOR SPACE AND AIRBORNE EARTH SENSING APPLICATIONS. THE RADIOMETER INSTRUMENTATION INSTALLED ON CUBESATS AND SMALLSATS IS REQUIRED TO HAVE SMALL VOLUME, LOW WEIGHT AND CONSUME LOW POWER. CURRENTLY USED CORRELATING RADIOMETERS RELY ON ANALOG SIGNAL PROCESSING, THUS ARE BULKY, POWER HUNGRY AND CANNOT BE REPROGRAMMED. ANALOG FILTER PARAMETERS TEND TO BE UNSTABLE OVER TEMPERATURE, POWER SUPPLY VOLTAGE, MAY DEGRADE OVER TIME AND NEED TUNING. THE PROPOSED LOW-POWER, RAD-HARD ASIC WILL OPERATE WITH MICROWAVE CORRELATION RADIOMETER FRONT ENDS DOWN-CONVERTING THE RF TO UP TO 10GHZ IF QUADRATURE SIGNALS. THE ASIC WILL INCLUDE DIGITIZERS, BANDPASS FILTERS, CROSS-CORRELATORS, TOTALIZERS, SERIALIZERS, AN OUTPUT DATA INTERFACE AND AN I2C INTERFACE FOR THE ASIC'S PROGRAMMING. BANDPASS FILTERS WILL SPLIT UP THE DIGITIZED QUADRATURE IF INPUT SIGNALS INTO BANDS (UP TO 16), WILL CROSS-CORRELATE THE SIGNALS WITHIN EACH BAND AND WILL SHIP OUT THE RESULTANT DATA IN A CONVENIENT FORMAT. INSTEAD OF ANALOG SIGNAL PROCESSING PERFORMING A STRICTLY DEFINED FUNCTION, THE ASIC WILL EMPLOY A DIGITAL SIGNAL PROCESSING WHICH CAN BE REPROGRAMMED TO ADOPT SPECIFIC PARAMETERS OF THE FILTER BLOCK SUCH AS THE NUMBER OF BANDS, EACH FILTER'S CORNER FREQUENCY, BANDWIDTH AND FILTER'S ORDER. A NUMBER OF INNOVATIONS WILL BE INTRODUCED TO THE ASIC IN ORDER TO COMBINE PROGRAMMABILITY, LOW POWER CONSUMPTION AND RADIATION TOLERANCE. THE PROJECT'S PHASE I WILL PROVIDE THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED ASIC. PHASE II WILL INCLUDE FINISHING THE DESIGN, CHIP FABRICATION, TESTING AND DELIVERING THE ADC PROTOTYPES WHICH WILL BE READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX17CP60P  
Thursday, June 1, 2017
$125,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF SPECTROMETERS CURRENTLY EMPLOYED OR UNDER DEVELOPMENT BY NASA ARE BASED ON A PRINTED CIRCUIT BOARD (PCB) INCLUDING FIELD PROGRAMMABLE ARRAYS (FPGAS) AND A NUMBER OF OTHER DISCRETE COMPONENTS. AN APPLICATION SPECIFIC INTEGRATED CIRCUIT (ASIC) BASED SPECTROMETER OFFERS A GREAT REDUCTION IN WEIGHT, VOLUME AND POWER CONSUMPTION COMPARED TO THE FPGA/PCB BASED IMPLEMENTATION. THIS PROPOSAL AIMS TO DEVELOP A RADIATION-HARDENED (RH) LOW-POWER (LP) POLY-PHASE SPECTROMETER (PPS) ASIC. THE PROPOSED RH LP PPS ASIC AIMS TO ACHIEVE A 4GHZ BANDWIDTH AND 214 (16384) FREQUENCY BINS. IN ORDER TO IMPLEMENT THE REQUIRED FUNCTIONALITY AND MEET THE SPECIFICATIONS WHILE CONSUMING BELOW 2.5W OF POWER, THE PROPOSED ASIC WILL INCLUDE A STATE-OF-THE-ART ADC, A DEMULTIPLEXER, A POLY-PHASE FILTER BANK, A WINDOWING FUNCTION, A FAST-FOURIER-TRANSFORM CORE, A FAST-FOURIER-DATA ANALYSIS BLOCK, A DATA READOUT, A DIGITAL CONTROL UNIT AND TESTING FEATURES. TOLERANCE TO AT LEAST 4MRADS OF TOTAL IONIZING DOSE (TID) RADIATION AND IMMUNITY TO THE SINGLE EVENT EFFECTS (SEES) WILL BE ACHIEVED BY EMPLOYING RADIATION HARDENING BY DESIGN, BY LAYOUT, AND BY SYSTEM TECHNIQUES AND ALSO BY APPLYING AN ULTRA-THIN GATE OXIDE TECHNOLOGY FOR IMPLEMENTATION. LOW POWER CONSUMPTION WILL BE ACHIEVED BY EMPLOYING SPECIAL MULTIPLIER-LESS-ACCUMULATORS AND MULTIPLIER-LESS-"BUTTERFLIES". THE POWER CONSUMPTION WILL BE FURTHER REDUCED BY SWITCHING OFF THE UNUSED ASIC'S BLOCKS, DOWN RATING THE CLOCK FREQUENCY, ELIMINATING UNNECESSARY BUFFERING AND APPLYING THE 28NM CMOS TECHNOLOGY. PHASE I WORK WILL PROVIDE THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED SPECTROMETER ASIC. PHASE II WILL RESULT IN THE SILICON PROVEN ASIC'S PROTOTYPES READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX17CG58P  
Wednesday, May 31, 2017
$0.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS GEOSTAR SPECTRAL RADIOMETER PROCESSING DATA FROM ANTENNA CONSISTING OF THREE ARMS, EACH HOLDING 128 MICROWAVE RECEIVERS. EACH OF THE 384 RECEIVERS AMPLIFIES RF SIGNALS, AND DOWN-CONVERTS THEM TO AN INTERMEDIATE FREQUENCY (IF). AS A RESULT, 768 IN-PHASE (I) AND QUADRATURE (Q) SIGNALS ARE PRODUCED WITH A FREQUENCY OF 10 TO 500MHZ. THE IF SIGNALS HAVE TO BE NORMALIZED AND DIGITIZED WITH 1GS/S SAMPLING RATE FOR FURTHER CROSS-CORRELATION. EACH SIGNAL FROM ONE ARM OF THE RECEIVER MUST BE CROSS-CORRELATED WITH ALL SIGNALS FROM THE OTHER TWO ARMS, THEREFORE A SYSTEM CONTAINING 196,000 PARALLEL CROSS-CORRELATION BLOCKS IS NEEDED. SINCE THE GEOSTAR IS A SPACE BORN INSTRUMENT, LOW POWER DISSIPATION AND ENSURING SYSTEM RELIABILITY, THROUGH PROCESSING REDUNDANCY, ARE ONE OF THE MOST IMPORTANT REQUIREMENTS. A SYSTEM ASSEMBLED BY USING OFF-THE-SHELF COMPONENTS WOULD BE EXTREMELY POWER INEFFICIENT, BULKY, AND UNRELIABLE. THEREFORE, A SYSTEM THAT IS BASED ON APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS) IS REQUIRED. WHILE WORKING ON THE NASA'S SBIR PHASE II PROJECT "LOW POWER CROSS-CORRELATOR ASIC" (NNX13CP01C), PACIFIC MICROCHIP CORP. HAS DEVELOPED AND FABRICATED AN ASIC THAT INCLUDES 128-ELEMENT ARRAY OF 2-BIT 1GS/S ADCS, AND 4096 PARALLEL CROSS-CORRELATION CELLS. THE ASIC WAS DESIGNED BASED ON THE GEOSTAR RADIOMETER REQUIREMENTS, THEREFORE IT IS INTENDED TO BE THE KEY COMPONENT IN THE CROSS-CORRELATOR SYSTEM WHICH IS BEING DEVELOPED. THE SYSTEM WILL CONTAIN MEANS CORRELATION RESULTS FURTHER POST-PROCESSING AND CONTROL OF ASICS.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CP17C     NNX15SBIRII  
Wednesday, May 10, 2017
$0.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE MEASUREMENT OF THE MAGNETIC FIELD VECTOR IS OF FUNDAMENTAL IMPORTANCE TO SPACE PHYSICS MISSIONS. THE FLUXGATE MAGNETOMETER IS A DEVICE DEVELOPED FOR PRECISE VECTOR MEASUREMENT OF STATIC MAGNETIC FIELDS. THE HIGH PERFORMANCE MAGNETOMETERS ARE REQUIRED IN SUCH NASA MISSIONS AS ICON, GOLD, SOLAR ORBITER, SOLAR PROBE PLUS, ONEP, SEPAT, INCA, CISR, DGC, HMAG AND OTHER PLANETARY EXPLORATIONS. THE ANALOG-TO-DIGITAL CONVERTER (ADC) IS ONE OF THE CRITICAL COMPONENTS OF THE MAGNETOMETER. THE ERFORMANCE OF THE MAGNETOMETER DIRECTLY DEPENDS ON THE ADC'S CHARACTERISTICS SUCH AS THE RESOLUTION, ACCURACY, AND CONVERSION SPEED. THE GENERAL REQUIREMENTS FOR ALL ADCS USED IN SPACE MISSIONS ARE LOW POWER CONSUMPTION, LOW AREA, AND HIGH RADIATION TOLERANCE. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A RAD-HARD ADC SPECIFICALLY TARGETED FOR APPLICATION IN FLUXGATE MAGNETOMETERS. PHASE I WORK PROVIDED A PROOF OF FEASIBILITY, COMPLETE DEFINITION AND VALIDATION BASED ON EXTENSIVE SIMULATION AND ANALYSIS OF THE PROPOSED ADC. DURING PHASE II THE ADC DESIGN WILL BE FINISHED, THE ADC WILL BE FABRICATED, PACKAGED AND TESTED (INCLUDING RADIATION HARDINESS). AT THE END OF PHASE II A FIELDABLE PRODUCT WILL BE PRODUCED. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, THE PRODUCT WILL BE FABRICATED USING A COMMERCIAL 180NM CMOS TECHNOLOGY.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CG05C     NNX15SBIRII  
Friday, April 7, 2017
$250,000.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ12: R&D- OTHER RESEARCH AND DEVELOPMENT (APPLIED RESEARCH/EXPLORATORY DEVELOPMENT)

  IND17PC00116     SBIR 15.3  
Thursday, March 9, 2017
$0.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ11: R&D- OTHER RESEARCH AND DEVELOPMENT (BASIC RESEARCH)

  IND16PC00088     SBIR 15.3  
Thursday, December 15, 2016
$49,898.51
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ11: R&D- OTHER RESEARCH AND DEVELOPMENT (BASIC RESEARCH)

  IND16PC00088     SBIR 15.3  
Tuesday, September 20, 2016
$0.00
9700: Department of Defense
140D63: IBC ACQ SERVICES DIVISION (00063)

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ11: R&D- OTHER RESEARCH AND DEVELOPMENT (BASIC RESEARCH)

  IND16PC00088     SBIR 15.3  
Friday, June 3, 2016
$125,000.00
8000: National Aeronautics and Space Administration
80NSSC: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF THE PROPOSED PROJECT AIMS TO DEVELOP A 20GSPS 6-BIT RADIATION HARDENED ANALOG TO DIGITAL CONVERTER (ADC) REQUIRED FOR MICROWAVE RADIOMETERS BEING DEVELOPED FOR SPACE AND AIR BORNE EARTH SENSING APPLICATIONS. AIMING TO IMPROVE PERFORMANCE AND TO REDUCE THE SIZE OF THE ELECTRONICS, HIGH RESOLUTION, HIGH-SAMPLING RATE, POWER EFFICIENCY AND LOW SPUR ENERGY ARE THE REQUIREMENTS FOR ADCS EMPLOYED FOR DIRECT DIGITIZATION IN MICROWAVE RADIOMETERS. THE PROPOSED 20GS/S 6-BIT INTERLEAVED SUCCESSIVE APPROXIMATION (SAR) ADC IS INTENDED TO ACHIEVE>5 ENOB AND 20GHZ INPUT BANDWIDTH. A NUMBER OF INNOVATIONS WILL BE INTRODUCED TO THE ADC IN ORDER TO COMBINE LOW POWER CONSUMPTION WITH HIGH SIGNAL TO NOISE AND DISTORTION (SINAD), AND SPURIOUS FREE DYNAMIC RANGE (SFDR) WHICH IS IMPORTANT FOR SPECTROGRAPHY APPLICATIONS. A NOVEL LOW GLITCH ENERGY TECHNIQUE COUPLED WITH INTERLEAVED SAMPLES APERTURE CALIBRATION WILL BE INTRODUCED TO ACHIEVE DIGITIZATION ACCURACY, IMPROVE LINEARITY AND ACHIEVE HIGH SAMPLING RATE. THE PROPOSED ADC ASIC WILL CONTAIN ON-CHIP ALL NECESSARY COMPONENTS, INCLUDING A FREQUENCY SYNTHESIZER, SERIAL INTERFACE, STANDARD INTERFACE WITH AN FPGA, AND DESIGN-FOR-TESTABILITY FEATURES. THE ADC WILL BE IMPLEMENTED USING A DEEP SUBMICRON CMOS TECHNOLOGY. THE PROJECT'S PHASE I WILL PROVIDE THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED ADC. PHASE II WILL INCLUDE FINISHING DESIGN, FABRICATION, TESTING AND DELIVERING THE ADC PROTOTYPES WHICH WILL BE READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX16CP67P     NNX16SBIRPH1  
Tuesday, March 15, 2016
$104,973.88
9700: Department of Defense
00063: NBC ACQUISITION SERVICES DIVISION

D: DEFINITIVE CONTRACT
IGF::OT::IGF HIGH-SAMPLE RATE ANALOG TO DIGITAL CONVERTERS FOR RECONFIGURABLE PHASED ARRAY APPLICATIONS
AZ11: R&D- OTHER RESEARCH AND DEVELOPMENT (BASIC RESEARCH)

  IND16PC00088     SBIR 15.3  
Tuesday, September 8, 2015
$0.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE MEASUREMENT OF THE MAGNETIC FIELD VECTOR IS OF FUNDAMENTAL IMPORTANCE TO SPACE PHYSICS MISSIONS. THE FLUXGATE MAGNETOMETER IS A DEVICE DEVELOPED FOR PRECISE VECTOR MEASUREMENT OF STATIC MAGNETIC FIELDS. THE HIGH PERFORMANCE MAGNETOMETERS ARE REQUIRED IN SUCH NASA MISSIONS AS ICON, GOLD, SOLAR ORBITER, SOLAR PROBE PLUS, ONEP, SEPAT, INCA, CISR, DGC, HMAG AND OTHER PLANETARY EXPLORATIONS. THE ANALOG-TO-DIGITAL CONVERTER (ADC) IS ONE OF THE CRITICAL COMPONENTS OF THE MAGNETOMETER. THE ERFORMANCE OF THE MAGNETOMETER DIRECTLY DEPENDS ON THE ADC'S CHARACTERISTICS SUCH AS THE RESOLUTION, ACCURACY, AND CONVERSION SPEED. THE GENERAL REQUIREMENTS FOR ALL ADCS USED IN SPACE MISSIONS ARE LOW POWER CONSUMPTION, LOW AREA, AND HIGH RADIATION TOLERANCE. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A RAD-HARD ADC SPECIFICALLY TARGETED FOR APPLICATION IN FLUXGATE MAGNETOMETERS. PHASE I WORK PROVIDED A PROOF OF FEASIBILITY, COMPLETE DEFINITION AND VALIDATION BASED ON EXTENSIVE SIMULATION AND ANALYSIS OF THE PROPOSED ADC. DURING PHASE II THE ADC DESIGN WILL BE FINISHED, THE ADC WILL BE FABRICATED, PACKAGED AND TESTED (INCLUDING RADIATION HARDINESS). AT THE END OF PHASE II A FIELDABLE PRODUCT WILL BE PRODUCED. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, THE PRODUCT WILL BE FABRICATED USING A COMMERCIAL 180NM CMOS TECHNOLOGY.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CG05C     NNX15SBIRII  
Tuesday, May 26, 2015
$750,000.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE MEASUREMENT OF THE MAGNETIC FIELD VECTOR IS OF FUNDAMENTAL IMPORTANCE TO SPACE PHYSICS MISSIONS. THE FLUXGATE MAGNETOMETER IS A DEVICE DEVELOPED FOR PRECISE VECTOR MEASUREMENT OF STATIC MAGNETIC FIELDS. THE HIGH PERFORMANCE MAGNETOMETERS ARE REQUIRED IN SUCH NASA MISSIONS AS ICON, GOLD, SOLAR ORBITER, SOLAR PROBE PLUS, ONEP, SEPAT, INCA, CISR, DGC, HMAG AND OTHER PLANETARY EXPLORATIONS. THE ANALOG-TO-DIGITAL CONVERTER (ADC) IS ONE OF THE CRITICAL COMPONENTS OF THE MAGNETOMETER. THE ERFORMANCE OF THE MAGNETOMETER DIRECTLY DEPENDS ON THE ADC'S CHARACTERISTICS SUCH AS THE RESOLUTION, ACCURACY, AND CONVERSION SPEED. THE GENERAL REQUIREMENTS FOR ALL ADCS USED IN SPACE MISSIONS ARE LOW POWER CONSUMPTION, LOW AREA, AND HIGH RADIATION TOLERANCE. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A RAD-HARD ADC SPECIFICALLY TARGETED FOR APPLICATION IN FLUXGATE MAGNETOMETERS. PHASE I WORK PROVIDED A PROOF OF FEASIBILITY, COMPLETE DEFINITION AND VALIDATION BASED ON EXTENSIVE SIMULATION AND ANALYSIS OF THE PROPOSED ADC. DURING PHASE II THE ADC DESIGN WILL BE FINISHED, THE ADC WILL BE FABRICATED, PACKAGED AND TESTED (INCLUDING RADIATION HARDINESS). AT THE END OF PHASE II A FIELDABLE PRODUCT WILL BE PRODUCED. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, THE PRODUCT WILL BE FABRICATED USING A COMMERCIAL 180NM CMOS TECHNOLOGY.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CG05C     NNX15SBIRII  
Friday, May 22, 2015
$1,500,000.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

D: DEFINITIVE CONTRACT
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS GEOSTAR SPECTRAL RADIOMETER PROCESSING DATA FROM ANTENNA CONSISTING OF THREE ARMS, EACH HOLDING 128 MICROWAVE RECEIVERS. EACH OF THE 384 RECEIVERS AMPLIFIES RF SIGNALS, AND DOWN-CONVERTS THEM TO AN INTERMEDIATE FREQUENCY (IF). AS A RESULT, 768 IN-PHASE (I) AND QUADRATURE (Q) SIGNALS ARE PRODUCED WITH A FREQUENCY OF 10 TO 500MHZ. THE IF SIGNALS HAVE TO BE NORMALIZED AND DIGITIZED WITH 1GS/S SAMPLING RATE FOR FURTHER CROSS-CORRELATION. EACH SIGNAL FROM ONE ARM OF THE RECEIVER MUST BE CROSS-CORRELATED WITH ALL SIGNALS FROM THE OTHER TWO ARMS, THEREFORE A SYSTEM CONTAINING 196,000 PARALLEL CROSS-CORRELATION BLOCKS IS NEEDED. SINCE THE GEOSTAR IS A SPACE BORN INSTRUMENT, LOW POWER DISSIPATION AND ENSURING SYSTEM RELIABILITY, THROUGH PROCESSING REDUNDANCY, ARE ONE OF THE MOST IMPORTANT REQUIREMENTS. A SYSTEM ASSEMBLED BY USING OFF-THE-SHELF COMPONENTS WOULD BE EXTREMELY POWER INEFFICIENT, BULKY, AND UNRELIABLE. THEREFORE, A SYSTEM THAT IS BASED ON APPLICATION SPECIFIC INTEGRATED CIRCUITS (ASICS) IS REQUIRED. WHILE WORKING ON THE NASA'S SBIR PHASE II PROJECT "LOW POWER CROSS-CORRELATOR ASIC" (NNX13CP01C), PACIFIC MICROCHIP CORP. HAS DEVELOPED AND FABRICATED AN ASIC THAT INCLUDES 128-ELEMENT ARRAY OF 2-BIT 1GS/S ADCS, AND 4096 PARALLEL CROSS-CORRELATION CELLS. THE ASIC WAS DESIGNED BASED ON THE GEOSTAR RADIOMETER REQUIREMENTS, THEREFORE IT IS INTENDED TO BE THE KEY COMPONENT IN THE CROSS-CORRELATOR SYSTEM WHICH IS BEING DEVELOPED. THE SYSTEM WILL CONTAIN MEANS CORRELATION RESULTS FURTHER POST-PROCESSING AND CONTROL OF ASICS.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX15CP17C     NNX15SBIRII  
Friday, February 13, 2015
$250,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Tuesday, December 16, 2014
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Thursday, July 3, 2014
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Thursday, June 26, 2014
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Friday, June 6, 2014
$125,000.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF THE NASA'S PATH MISSION EMPLOYS A SYNTHETIC APERTURE RADIOMETER THAT PRODUCES 768 IF (10MHZ - 500MHZ) SIGNALS. DIGITIZING THE SIGNALS RESULTS IN 1.536TB/S (1GS/S, 2-BIT) DATA STREAM. WITHIN THE NASA'S SBIR CONTRACTS NNX12CE50P AND NNX13CP01C, PACIFIC MICROCHIP CORP. HAS DEVELOPED A LOW POWER 64X64 CROSS-CORRELATOR ASIC OFFERING THE REDUCTION OF THE AMOUNT OF DATA TO MANAGEABLE LEVELS. THIS ASIC INCLUDES AN ARRAY OF 128 DIGITIZERS OPERATED AT 1GS/S AND 2-BIT PRECISION. THIS ASIC IS THE KEY COMPONENT IN THE PROPOSED CROSS-CORRELATOR SYSTEM FOR THE PATH MISSION. THE INNOVATION OFFERS TO GREATLY REDUCE THE POWER CONSUMPTION, WEIGHT AND THE SYSTEM'S COMPLEXITY. PHASE I WILL DEMONSTRATE THE FEASIBILITY OF IMPLEMENTATION OF THE SYSTEM BASED ON THE DEVELOPED ASIC. WE WILL DESIGN THE CROSS-CORRELATOR SYSTEM'S SCHEMATIC, ITS BEHAVIORAL MODEL AND WILL RUN THE SIMULATIONS PROVING THE REQUIREMENTS OF THE PATH MISSION CAN BE MET. THE PCB WILL ALSO BE DESIGNED TO PROVE THE FEASIBILITY OF THE SYSTEM'S PHYSICAL IMPLEMENTATION AND MEETING ELECTRICAL AND THERMAL REQUIREMENTS. PHASE II WILL RESULT IN THE COMPLETE SYSTEM'S ASSEMBLY, ITS ELECTRICAL AND THERMAL CHARACTERIZATION AND VALIDATION ON THE PATH'S RADIOMETER WHICH IS BEING DEVELOPED AT JPL.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX14CP62P     NNX14SBIRSELECTPHASEI  
Thursday, June 5, 2014
$125,000.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
IGF::OT::IGF THE PROPOSED PROJECT AIMS TO DEVELOP A MULTI-CHANNEL ANALOG TO DIGITAL CONVERTER (ADC) REQUIRED FOR A FLUXGATE MAGNETOMETER (EPD) EMPLOYED ON NASA'S PLANETARY EXPLORATION MISSIONS. THE ADC HAS TO FEATURE VERY HIGH RESOLUTION, RADIATION HARDNESS (TOLERANCE TO SEE AND TID), LOW POWER CONSUMPTION AND BE SUITABLE FOR OPERATION OVER A WIDE TEMPERATURE RANGE. THE PROPOSED 3-CHANNEL SIGMA-DELTA ADC WILL BE A WIDE-TUNABLE DEVICE WHICH WILL ACHIEVE RESOLUTION FROM 17 TO 23.5 EFFECTIVE NUMBER OF BITS (ENOB) AT 51.2KS/S RATE. THE COMBINATION OF THE INNOVATIVE RECONFIGURABLE ARCHITECTURE AND LOW DISTORTION TOPOLOGY WILL PERMIT TO OPTIMIZE THE ADC'S POWER CONSUMPTION WITHIN A WIDE RANGE AND TO ENSURE 3.5FJ FIGURE OF MERIT (FOM). THE OFFSET CANCELLATION TECHNIQUE WILL BE IMPLEMENTED TO THE ADC TO SOLVE THE OFFSET PROBLEM COMMON TO ALL MAGNETOMETERS. RADIATION HARDENING TECHNIQUES SUCH AS RHBD, RHBL AND RHBS WILL BE EMPLOYED. THE PROPOSED NOVEL 17-LEVEL SUB-ADC'S TOPOLOGY REQUIRES TWO TIMES FEWER COMPARATORS THAN CLASSIC TOPOLOGY, WHICH ALSO HELPS TO SAVE POWER AND TO REDUCE THE ON-CHIP AREA. THE ADC WILL BE IMPLEMENTED USING IBM'S DEEP SUBMICRON SOI CMOS TECHNOLOGY WITH CONNECTED BODY OPTION. PHASE I WORK WILL PROVIDE THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED ADC. PHASE II WILL RESULT IN THE SILICON PROVEN ADC'S PROTOTYPES BEING READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX14CG25P     NNX14SBIRPHASEI  
Tuesday, March 18, 2014
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Wednesday, June 5, 2013
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Monday, April 22, 2013
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Monday, April 22, 2013
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Wednesday, January 16, 2013
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Wednesday, December 19, 2012
$700,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
IGF::OT::IGF - THE NASA'S PATH MISSION INCLUDES THE GEOSTAR SATELLITE THAT CARRIES ABOARD A MICROWAVE SOUNDER EMPLOYING AN ARRAY OF 375 MICROWAVE ANTENNAS WITH CORRESPONDING RECEIVERS. EACH RECEIVER IS TUNED TO THE 180GHZ FREQUENCY, WHILE THE INTERMEDIATE FREQUENCY (IF) REACHES 500MHZ. THE IF SIGNAL IS QUANTIZED AT 1GHZ WITH 2-BIT ACCURACY. THE RESULTING DATA RATE IS 700GB/S. THIS DATA HAS TO BE PRE-PROCESSED ABOARD THE SATELLITE BEFORE IT CAN BE TRANSMITTED TO EARTH FOR FURTHER PROCESSING. ONE OF THE STEPS OF SUCH DATA PROCESSING IS CROSS-CORRELATION. FOR A SPACE BORNE INSTRUMENT, POWER DISSIPATION AND RADIATION HARDNESS ARE AMONG THE MOST IMPORTANT REQUIREMENTS. PACIFIC MICROCHIP CORP. IS DESIGNING AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT WITH INTERFACES FOR THE GEOSTAR'S RECEIVERS. THE ASIC WILL HAVE GREATLY REDUCED POWER CONSUMPTION COMPARED TO THAT OF THE FPGA-BASED OR CLASSIC ASIC-BASED IMPLEMENTATIONS. THIS ASIC MUST BE DESIGNED AND INTEGRATED WITH ALREADY EXISTING SYSTEM COMPONENTS OF THE GEOSTAR INSTRUMENT. THE ASIC INCLUDES CROSS-CORRELATION CELLS BASED ON NOVEL ARCHITECTURE. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO THE TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION-INDUCED LATCH-UP. THE DESIGN OF THE ASIC WILL FOLLOW DESIGN FOR TESTABILITY (DFT) METHODS, WHICH WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC, REDUCE RISK AND LOWER THE COST OF THE PRODUCT.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX13CP01C     NNX13SBIRPHASE11  
Tuesday, December 18, 2012
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Monday, October 15, 2012
$199,973.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Monday, July 16, 2012
$0.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Monday, February 13, 2012
$124,971.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

PO Purchase Order
NASA'S LATEST EFFORT IN DEVELOPING A COMMON PLATFORM FOR SPACE COMMUNICATION AND NAVIGATION SYSTEMS IS THE SPACE TELECOMMUNICATIONS RADIO SYSTEM (STRS) STANDARD. IT DEFINES ARCHITECTURE ENABLING INTEROPERABILITY OF SOFTWARE DEFINED RADIO (SDR) COMPONENTS. FUTURE PROOF, POWER CONSCIOUS ARCHITECTURES OF STRS COMPLIANT RE-CONFIGURABLE SDR TRANSCEIVERS ARE NEEDED FOR IMPLEMENTATION OF ENVISIONED SPACE COMMUNICATION SYSTEMS. PACIFIC MICROCHIP CORP. PROPOSES TO DEVELOP A HIGHLY INTEGRATED, LOW-POWER, MULTIFUNCTIONAL 56GS/S DIRECT DIGITAL MODULATION/DEMODULATION (DDM) SDR TRANSCEIVER USING 45NM SOI CMOS TECHNOLOGY. THE RESULTING STRS COMPLIANT INTEGRATED SOLUTION WILL BE RADIATION TOLERANT BY TECHNOLOGY AND DESIGN. THE DIRECT CONVERSION BASED TRANSCEIVER UTILIZES NOVEL 56GS/S D/A AND A/D CONVERTERS AND FEATURES ARBITRARY WAVEFORM GENERATION (AWG) MODE. THE AVAILABILITY OF AWG AND DDM MODES REMOVES LIMITATIONS ON THE SYNTHESIZED WAVEFORM SHAPES UP TO 28GHZ. PACIFIC MICROCHIP CORP. PROPOSES ALL-DIGITAL IMPLEMENTATION OF FREQUENCY UP- AND DOWN-CONVERSION, I/Q MODULATION AND DEMODULATION. SINCE DIGITAL POWER IS MOSTLY DYNAMIC, DIGITAL PROCESSING WILL ENABLE POWER CONSUMPTION SCALING LINEARLY WITH THE OPERATING FREQUENCY. PHASE I WORK WILL PROVIDE A COMPLETE DEFINITION AND IN-SILICO VALIDATION OF THE PROPOSED DEVICE. THE PHASE II PROGRAM WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMMERCIAL RADIATION-TOLERANT CMOS SOI TECHNOLOGY WILL BE USED.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX12CD71P     SBIR12PHASE1  
Monday, February 13, 2012
$124,971.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

PO Purchase Order
PACIFIC MICROCHIP CORP. OFFERS TO DESIGN AN ASIC THAT INCLUDES A CROSS-CORRELATION UNIT TOGETHER WITH THE INTERFACES TO BE CONNECTED TO THE OUTPUT OF THE GEOSTAR'S RECEIVERS, MULTIPLEXER AND OUTPUT INTERFACE FOR THE GEOSTAR'S SYSTEM-LEVEL INTEGRATION. THE PROPOSED NOVEL ASIC REQUIRED BY NASA'S PATH MISSION WILL HAVE A GREATLY REDUCED POWER CONSUMPTION COMPARED TO A FPGA BASED OR A CLASSIC ASIC BASED IMPLEMENTATIONS, INCREASED RADIATION HARDNESS AND EXTENDED OPERATING TEMPERATURE RANGE. THE PROPOSED CROSS-CORRELATION UNIT CONSISTS OF CROSS-CORRELATION CELLS WHICH ARE BASED ON NOVEL ARCHITECTURE. THE LOGIC PRIMITIVES ARE ARRANGED TO "WORK WHEN MUST" RATHER THAN TO "WORK WHEN NEED" IN THESE NOVEL CROSS-CORRELATION CELLS. THE HIGH SPEED INTERFACES THE PROPOSED ASIC WILL INCORPORATE CAN MINIMIZE THE POWER CONSUMPTION AND INCREASE THE RELIABILITY. TERMINATION RESISTORS, AMPLIFIERS, ANALOG-TO-DIGITAL-CONVERTERS REALIZED INSIDE THE ASIC WILL SAVE POWER DUE TO SHORTER INTERCONNECTS COMPARED TO INTERCONNECTS THAT ARE USED IN FPGAS. MOREOVER, THE HIGH-SPEED RECEIVERS-DESERIALIZERS COULD FURTHER SAVE THE POWER DUE TO REDUCED NUMBER OF TERMINATION RESISTORS COMPARED TO THE HIGH-SPEED INTERFACE WITH ANALOG-TO-DIGITAL CONVERTERS. THE DEEP SUBMICRON SOI CMOS TECHNOLOGY SELECTED FOR THE ASIC'S FABRICATION WILL INCREASE ITS TOLERANCE TO TOTAL IONIZING DOSE (TID) AND REDUCE THE PROBABILITY OF RADIATION INDUCED LATCH-UP. THE ASIC WILL BE DESIGNED FOLLOWING THE DESIGN FOR TESTABILITY (DFT) METHODS THAT WILL SIMPLIFY CHARACTERIZATION AND TESTING OF THE FABRICATED ASIC THUS WILL REDUCE THE RISK AND LOWER THE COST OF THE PRODUCT. PHASE I OF THE PROJECT WILL PROVIDE A COMPLETE DEFINITION OF THE PROPOSED ASIC, ITS DESIGN AND IN SILICO VALIDATION OF CRITICAL CIRCUITS. PHASE II WILL PRODUCE A FIELDABLE PRODUCT READY FOR COMMERCIALIZATION IN PHASE III.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX12CE50P     SBIR12PHASE1  
Thursday, January 26, 2012
$200,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Wednesday, November 16, 2011
$75,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D- SPACE: AERONAUTICS/SPACE TECHNOLOGY (BASIC RESEARCH)

  NNX11CB15C  
Tuesday, July 26, 2011
$50,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D-AERO & SPACE TECH-B RES

  NNX11CB15C  
Friday, June 3, 2011
$99,992.19
9700: DEPT OF DEFENSE
W909MY: W6QK ACC-APG CONT CT WASH OFC

DCA Definitive Contract
SBIR PHASE 1 REAL TIME ADAPTABLE ROIC FOR IMPROVED POWER AND PERFORMANCE OPTIMIZATION IN IMAGER SYSTEMS
AD93: OTHER DEFENSE (ADVANCED)

  W909MY11C0044  
Wednesday, June 1, 2011
$75,000.00
8000: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION
NSSC0: NASA SHARED SERVICES CENTER

DCA Definitive Contract
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH EMPLOY THE GEOSTAR INSTRUMENT, CONSISTING OF 600 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT 1GHZ BEFORE FURTHER PROCESSING IN THE CROSS-CORRELATORS. POWER CONSUMPTION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE CRITICAL IN SPACE BORN INSTRUMENTS. DURING PHASE I, PACIFIC MICROCHIP CORP. DESIGNED THE BLOCK DIAGRAMS AND CIRCUITS OF A MONOLITHIC ARRAY CONSISTING OF SIXTEEN 2-BIT ADCS. A SERIALIZER IS INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 32 TO 1. THIS REDUCES THE POWER CONSUMPTION PER ADC AND RESOLVES THE PROBLEM OF WIRING CONGESTION IN THE INTERFACE WITH CROSS-CORRELATORS. FOR FURTHER POWER REDUCTION, A NOVEL METASTABILITY PROGRAMMING FEATURE IS INTEGRATED INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION IS FUNDAMENTALLY SIMPLIFIED AS WELL. THE 2-WIRE SERIAL I2C (INTER-INTEGRATED CIRCUIT) INTERFACE ALLOWS ALL 1200 ADCS OF THE GEOSTAR INSTRUMENT TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK PROVIDED A COMPLETE DEFINITION AND IN SILICO VALIDATION OF THE MONOLITHIC ADC ARRAY WITH SERIAL OUTPUT. PHASE II OF THE PROJECT WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) SILICON-ON-ISOLATOR (SOI) TECHNOLOGY WILL BE USED FOR FABRICATION.
AR11: R&D-AERO & SPACE TECH-B RES

  NNX11CB15C  
Friday, April 2, 2010
$69,988.00
9700: DEPT OF DEFENSE
N00014: OFFICE OF NAVAL RESEARCH

PO Purchase Order
RESEARCH AND DEVELOPMENT IN THE PHYSICAL, ENGINEERING, AND LIFE SCIENCES (EXCEPT BIOTECHNOLOGY)
AD95: OTHER DEFENSE (OPERATIONAL)

  N0001410M0131  
Wednesday, January 27, 2010
$99,306.00
8000: National Aeronautics and Space Administration
NSSC0: NASA SHARED SERVICES CENTER

B: PURCHASE ORDER
MICROWAVE INTERFEROMETERS FOR NASA MISSIONS SUCH AS PATH AND SCLP CONSIST OF UP TO 900 RECEIVERS. EACH RECEIVER REQUIRES I AND Q ADCS (ANALOG-TO-DIGITAL CONVERTERS) FOR SIGNAL DIGITIZING AT>200MHZ BEFORE FURTHER DIGITAL PROCESSING IN THE CROSS-CORRELATORS. POWER DISSIPATION AS WELL AS INSTRUMENT VOLUME AND WEIGHT ARE THE MOST IMPORTANT PARAMETERS IN SPACE BORN INSTRUMENTS. PACIFIC MICROCHIP PROPOSES DESIGNING A MONOLITHIC ARRAY CONSISTING OF 20X1-BIT ADCS. A SERIALIZER WILL BE INTEGRATED TO REDUCE THE NUMBER OF OUTPUTS FROM 20 TO 1. THIS WILL REDUCE THE POWER PER ADC AND RESOLVE THE PROBLEM OF WIRING CONGESTION WHERE THE CROSS-CORRELATORS INTERFACE. FOR FURTHER POWER REDUCTION, PACIFIC MICROCHIP PROPOSES INTEGRATING A NOVEL METASTABILITY PROGRAMMING FEATURE INTO THE ADC LATCHES. THE CLOCK DISTRIBUTION WILL ALSO BE DRAMATICALLY SIMPLIFIED. THE 2-WIRE SERIAL I C (INTER-INTEGRATED CIRCUIT) INTERFACE WILL ALLOW ALL 1800 ADCS TO BE CALIBRATED AND OPTIMIZED. PHASE I WORK WILL PROVIDE A COMPLETE DEFINITION, IN SILICO VALIDATION OF THE PRODUCT, AND A HARDWARE PROOF OF CONCEPT. THE PHASE II PROGRAM WILL PRODUCE A FIELDABLE PRODUCT. IN ORDER TO FACILITATE THE COMMERCIALIZATION EFFORTS IN PHASE III, A LOW COST COMMERCIAL RADIATION-TOLERANT SIGE HTB TECHNOLOGY WILL BE USED TO FABRICATE THE PRODUCT.
AR11: R&D-AERO & SPACE TECH-B RES

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